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[1] CHEN X N.Research on ingle event upset tolerant design methods for SRAM-based FPGAs[D].Mianyang:Southwest University of Science and Technology,2024. [2] Herbert E,Sega R,McGraw J,et al.Risk management for commercial-off-the-shelfparts based space hardware[J].Systems Engineering,2025,28(3):374-392. [3] WANG F.Design of an ICAP-based single event upset mitigation system for SRAM-based FPGAs[D].Beijing:University of Chinese Academy of Sciences,2022. [4] Ibe E H,Yoshimoto S,Yoshimoto M,et al.Radiation-induced soft errors[M].Tokyo:Springer Japan,2018. [5] XU W L,LI K X,XU Z,et al.Single event effect hardening techniques for RISC-V-based systems[J].Electronics & Packaging,2025,doi:10.16257/j.cnki.1681-1070.2026.0023. [6] Bastos R P,Picas M G,Velazco R.Medium-earth-orbit spaceflight radiation effects in triple modular system on programmable device[J].IEEE Transactions on Nuclear Science,2023,70(8):1783-1790. [7] Paparsenos E,Tsiatouhas Y.Radiation-hardened latch design with triple-node-upset recoverability[J].AEU-International Journal of Electronics and Communications,2024,187:155539,doi:10.1016/j.aeue.2024.155539. [8] Vasilikou K,Gogolou V,Noulis T.Radiation-hardened cells for analog design:comprehensive review and design flow[C]//Proceedings of the 13th International Conference on Modern Circuits and Systems Technologies(MOCAST),2024:1-4. [9] Almazmomi N K.Enhanced reed-solomon error correction framework for reliable data transmission in noisy communication systems[J].Internet Technology Letters,2025,8(6):e634,doi:10.1002/itl2.634. [10] Kakizaki T,Nakamura M,Kisaka Y.Channel-polarized multilevel coding for low-complexity forward error correction[J].Journal of Lightwave Technology,2025,43(10):4555-4563. [11] Xu C,Wu L,Liu W,et al.Block code design based on golay code for future communication systems[C]//Proceedings of the IEEE 99th Vehicular Technology Conference(VTC2024-Spring),2024:1-6. [12] Maity R K,Samanta J,Bhaumik J.An improved single and double-adjacent error correcting codec with lower decoding overheads[J].Journal of Signal Processing Systems,2023,95(6):721-733. [13] Shanthi G,Rao K S,Kumar A S,et al.Multi-bit error detection and correction codes implementation using generator-parity check matrices technique[J].Microsystem Technologies,2025,31(2):509-520. [14] Cui L,Wu F,Zhang M,et al.Enhanced LDPC coding for 3D TLC NAND flash memory:leveraging RBER difference from intra-layer variation[J].IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems,2025,doi:10.1109/TCAD.2025.3598931. [15] Rao N P,Desai M P.Neutron induced strike:on the likelihood of multiple bit-flips in logic circuits[J].arXiv preprint arXiv:1612.08239,2016. [16] Pintong K P.Towards lightweight real-time identification,classification,and detection of algorithm behavior in embedded systems via the power side channel[D].Binghamton,NY:State University of New York at Binghamton,2025. [17] Chen Z,Song S,Wei Z,et al.Approximating median absolute deviation with bounded error[J].Proceedings of the VLDB Endowment,2021,14(11):2114-2126. [18] Mramba L K,Liu X,Lynch K F,et al.Detecting potential outliers in longitudinal data with time-dependent covariates[J].European Journal of Clinical Nutrition,2024,78(4):344-350. 附中文参考文献: [1] 陈夏楠.面向SRAM型FPGA的抗单粒子翻转容错设计方法研究[D].绵阳:西南科技大学,2024. [3] 王 番.基于ICAP的SRAM型FPGA抗单粒子翻转系统设计[D].北京:中国科学院大学,2022. [5] 徐文龙,李凯旋,许 峥,等.基于RISC-V的抗单粒子加固研究[J].电子与封装,2025,doi:10.16257/j.cnki.1681-1070.2026.0023.
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