The high proportion of new energy integration complicates the working conditions of the power grid, leading to insufficient output accuracy of the second-order generalized integrator (SOGI) phase-locked loop. This article proposes an improved frequency adaptive phase-locked loop structure for SOGI. Firstly, an amplitude compensation branch is introduced to compensate for the tracking of the fundamental frequency signal by SOGI, ensuring the accuracy of the orthogonal signal output by SOGI under frequency fluctuation conditions. Secondly, by connecting two adaptive SOGI modules in series, the ability to suppress low order harmonics and DC components has been improved. Finally, the positive and negative sequence separation method of orthogonal signals is introduced to accurately extract the positive sequence synchronization signal of the power grid voltage and eliminate the influence of unbalanced components on the phase-locked loop. The comparative experiment with the classic SOGI-PLL method shows that the proposed phase-locked loop structure effectively improves the accuracy of power grid synchronization detection under complex working conditions such as harmonic components, unbalanced components, and frequency fluctuations. It can complete frequency detection within 30 ms, and the detected fundamental frequency positive sequence voltage has higher sinusoidality and harmonic distortion rate within 0.5%.
同步参考系锁相环SRF-PLL(Single Synchronous Reference Frame PLL)方法是较为经典的正负序电压分量估计方法,在电网同步技术中得到了广泛应用[11],但电网电压谐波和不平衡的干扰,可能导致输出精度下降[12]。因此,为了提高在复杂电网条件下的性能,研究者们通过增强锁相环的滤波能力,提出了适用于不同工况的改进措施,主要包括环路滤波和前置滤波两种方法[13-14]。环路滤波器会影响到PLL参数的调节,稳定性和跟踪速度较差[15];前置滤波器虽然面临多相电网电压的滤波问题[16],但是不影响锁相环系统的稳定性,因此前置滤波在电网同步中应用更为广泛。集成了移动平均滤波器(Moving Average Filter, MAF)和延迟相消(Delay Single Cancellation, DSC)等延时滤波方法的SRF-PLL[17-19],可应用于前置滤波和环路滤波,能有效减少特定频次电网谐波的影响,且滤波能力较优,从而获得更准确的电网电压同步信号。在频率自适应检测方面,通过串联多个相同参数的滤波器,可以增加陷波频带的宽度,能够实现小幅频率波动的自适应检测[20];也有研究通过负反馈补偿幅值和相角误差,实现宽频域频率自适应检测[21]。但是,以上频率自适应检测方法对于复杂的谐波信号,参数设计较为烦琐,并且当电网谐波频次发生变化时,需要重新设计整体滤波结构,不具有通用性。与延迟滤波类似的陷波滤波器(Notch Filter, NF)可选择性地消除谐波分量[22],然而,配置PLL控制回路需级联多个NF,增加了PLL结构的复杂性。文献[23]提出了结构简单的复数滤波器锁相环CCF-PLL(Complex Coefficient Filtering PLL),可以实现电网电压不平衡下快速准确的锁相,但带通滤波性能限制滤波效果,检测相位和频率误差较大。
基于广义积分器的锁相环具有带通滤波能力,能够滤除电网电压中的各次谐波和间谐波,在前置滤波中应用最为广泛。通过先滤除电网谐波,然后利用输出的正交信号提取电网电压正负序分量,展现出快速响应和良好的暂态性能。文献[24]基于二阶广义积分器(Second Order Generalized Integrator,SOGI)提出的锁相环结构,具有对谐波较优的抑制效果,但不能消除直流分量的影响。文献[25]提出了一种降阶广义积分器(Reduced Order Generalized Integrator, ROGI)的锁相环结构,提高了锁相环的动态性能,但谐波抑制能力受到不利影响。文献[26]提出在SOGI的基础上加入滤波环节,形成三阶广义积分器锁相环TOGI-PLL(Third Order Generalized Integrator PLL),能够进一步抑制直流分量的影响,但由于广义积分器选频特性的限制,对低次谐波的滤波效果较差,往往电网中的低次谐波含量较高,对锁相环的精度产生较大的影响,并且频率波动将导致输出基波存在误差。此外,还有研究者通过对上述不同滤波器进行组合,发挥滤波器的最优特性,分别应用在环路滤波和前置滤波中,实现混合滤波的锁相环结构[27-28]。但是,混合滤波的设计结构较为复杂,同时也会存在较大的延迟。
SHENX, SHUAIZ K, SHENC, et al. Review on operation and control of AC microgrid under large disturbance[J]. Automation of Electric Power Systems, 2021, 45(24): 174-188 (Ch).
MAOL, HUANGY C, ZHAOJ B, et al. PLL positive feedback effect suppression and stability analysis of grid-connected inverters under weak grid[J/OL]. Electric Power Automation Equipment, 2025: 1-13.
[7]
PRAKASHS, SINGHJ K, BEHERAR K, et al. A type-3 modified SOGI-PLL with grid disturbance rejection capability for single-phase grid-tied converters[J]. IEEE Transactions on Industry Applications, 2021, 57(4): 4242-4252. DOI: 10.1109/TIA.2021.3079122 .
JIANGY L, SIX Y, SHIH F, et al. Stability improvement method of grid-connected inverter considering phase-locked loop effect in weak grid[J]. Automation of Electric Power Systems, 2022, 46(24): 113-120. DOI: 10.7500/AEPS20220322002(Ch ).
[10]
ESKANDARIM, SAVKINA V. Robust PLL synchronization unit for grid-feeding converters in micro/weak grids[J]. IEEE Transactions on Industrial Informatics, 2023, 19(4): 5400-5411. DOI: 10.1109/TII.2022.3180074 .
[11]
REZAM S, HOSSAINM M, NASIFA O, et al. Fast estimation of phase angle for three-phase voltage systems under distorted conditions[J]. IEEE Journal of Emerging and Selected Topics in Power Electronics, 2022, 10(3): 2819-2828. DOI: 10.1109/JESTPE.2020.3044058 .
[12]
MOONJ H, LEEH M, LEEJ H, et al. Fast and stable synchronization between the grid and generator by virtual coordinates and feed-forward compensation in grid-tied uninterruptible power supply system[J]. IEEE Access, 2021, 9: 99374-99387. DOI: 10.1109/access.2021.3095905 .
LIY H, WANGX H, LIM Q. Optimal control strategy of grid connected inverters based on a novel phase-locked loop[J]. Distribution & Utilization, 2024, 41(9): 107-116. DOI: 10.19421/j.cnki.1006-6357.2024.09.012(Ch ).
ZHOUL, LIUY M, LIUJ S, et al. Application of zero phase moving average filter in LCL inverter[J]. Journal of Electrical Engineering, 2023, 18(1): 68-76. DOI: 10.11985/2023.01.007(Ch ).
CENY, HUANGM, CHAX M. The transient response analysis of SRF-PLL under the unbalance grid voltage sag[J]. Transactions of China Electrotechnical Society, 2016, 31(S2): 28-38. DOI: 10.19595/j.cnki.1000-6753.tces.2016.s2.004(Ch ).
[19]
MONDALS, GAYENP K, GAONKARD N. A fast and robust PLL design with a combination of frequency-adaptive alpha-beta-CDSC and SOGI[J]. IEEE Transactions on Industrial Electronics, 2025, 72(1): 949-958. DOI: 10.1109/TIE.2024.3413817 .
LIUQ D, WANGH Y, WANGH C, et al. Design of three-phase software phase locked loop based on prefilter[J]. Electric Power Automation Equipment, 2021, 41(7): 124-129. DOI: 10.16081/j.epae.202104010(Ch ).
WANGJ H, PANH, NAC N. Grid-connected synchronization method based on DDM-QT1-PLL under complex grid conditions[J]. Power System Protection and Control, 2020, 48(13): 132-141. DOI: 10.19783/j.cnki.pspc.190979(Ch ).
ZHANGZ B, WANGH Y, WANGW Q, et al. Single phase locked loop based on improved loop filter[J]. Power System Protection and Control, 2021, 49(13): 135-141. DOI: 10.19783/j.cnki.pspc.201090(Ch ).
WANGJ J, YUZ X, WUQ M, et al. HVDC fast phase-locked loop considering MAF delay and feedforward compensation[J]. Proceedings of the CSEE, 2024, 44(2): 535-547. DOI: 10.13334/j.0258-8013.pcsee.222242(Ch ).
CHENW, HES. Voltage synchronization method based on CSDFT-MAF-PLL under complex power grid[J]. Proceedings of the CSU-EPSA, 2022, 34(3): 74-82. DOI: 10.19635/j.cnki.csu-epsa.000837(Ch ).
LIX N, XUT, NIUD C. Fast delayed signal cancellation algorithm based on vector triangle principle[J]. Proceedings of the CSEE, 2021, 41(23): 8012-8020. DOI: 10.13334/j.0258-8013.pcsee.201815(Ch ).
[34]
SEVILMIŞF, KARACAH, AHMEDH. High-order delayed signal cancellation-based PLL under harmonically distorted grid voltages[J]. IEEE Transactions on Instrumentation and Measurement, 2023, 72: 9003609. DOI: 10.1109/TIM.2023.3298411 .
[35]
KASHIFM, SINGHB. Generalized DSC-FDC-PLL based synchronization of PV array-BES fed water pump system with utility grid[J]. IEEE Transactions on Industrial Informatics, 2024, 20(6): 8263-8273. DOI: 10.1109/TII.2024.3359457 .
[36]
SILVA M JDA, FERREIRAS C, SILVA J PDA, et al. Equivalency between adaptive Notch filter PLL and inverse park PLL by modeling and parameter adjustment[J]. IEEE Latin America Transactions, 2020, 18(12): 2112-2121. DOI: 10.1109/TLA.2020.9400439 .
[37]
GAUTAMS, XIAOW D, AHMEDH, et al. Enhanced single-phase phase locked loop based on complex-coefficient filter[J]. IEEE Transactions on Instrumentation and Measurement, 2022, 71: 9001408. DOI: 10.1109/TIM.2022.3147891 .
[38]
XIAOF R, DONGL, LIL, et al. A frequency-fixed SOGI-based PLL for single-phase grid-connected converters[J]. IEEE Transactions on Power Electronics, 2017, 32(3): 1713-1719. DOI: 10.1109/TPEL.2016.2606623 .
[39]
BAMIGBADEA, UMESHB S, KHADKIKARV, et al. Reduced-order generalized integrator-based phase-locked loop: Performance improvement for grid synchronization of single-phase inverters[J]. IEEE Transactions on Power Delivery, 2022, 37(5): 4382-4393. DOI:10.1109/TPWRD.2022.3169470 .
XUX F, MAW H, LUY, et al. Frequency adaptive active power filtering control strategy based on harmonic characteristics of a charging station[J]. Power System Protection and Control, 2024, 52(21): 24-34. DOI: 10.19783/j.cnki.pspc.240488(Ch ).
[43]
MELLOULIM, HAMOUDAM, HADJ SLAMA JBEN, et al. A third-order MAF based QT1-PLL that is robust against harmonically distorted grid voltage with frequency deviation[J]. IEEE Transactions on Energy Conversion, 2021, 36(3): 1600-1613. DOI: 10.1109/TEC.2021.3061027 .